Meta Unveils Four Custom AI Chips in Bold Nvidia Challenge

Meta Reveals Ambitious Four-Generation Custom Chip Roadmap

Meta Platforms unveiled plans to deploy four new generations of its Meta Training and Inference Accelerator (MTIA) chips within two years — a pace that would see a new chip released roughly every six months, far outpacing the industry standard of one to two years between generations.

The announcement represents Meta's most aggressive push yet to reduce its dependence on external chip suppliers like Nvidia and AMD, even as the company recently signed massive procurement deals with both companies. The four chips — MTIA 300, 400, 450, and 500 — are designed primarily for AI inference workloads across Facebook, Instagram, WhatsApp, and Meta's growing suite of generative AI products.

The Four Generations: From Ranking to GenAI

The MTIA 300 is already in production, currently powering the ranking and recommendation training systems that determine what billions of users see across Facebook and Instagram. The MTIA 400 (codenamed Iris) has completed lab testing and is moving toward data center deployment, with Meta describing it as "competitive with leading commercial products."

The next two generations — MTIA 450 (Arke), targeted for early 2027 mass production, and MTIA 500 (Astrid), following six months later — are designed to handle broader AI workloads, including generative AI inference for products like Meta AI. Each generation brings significant improvements in compute performance, memory bandwidth, and power efficiency.

Built on RISC-V With Modular Design

All four chips are built on the open-source RISC-V architecture, manufactured by TSMC, and developed in partnership with Broadcom. Meta's engineers designed the chips with modular, reusable components that "drop into existing rack system infrastructure, accelerating time-to-production."

Meta has already deployed hundreds of thousands of MTIA chips for inference workloads, reporting greater compute efficiency than general-purpose chips for its specific use cases. The company emphasized that its approach is "inference-first" — optimizing for the massive scale of serving AI responses to its 3.3 billion daily active users, rather than focusing primarily on model training.

What This Means for the Chip Industry

Meta's four-chip roadmap signals a broader trend of hyperscalers building custom silicon to control costs and optimize performance for their specific AI workloads. Google has its TPU line, Amazon has Trainium and Inferentia, and Microsoft has Maia. Meta's rapid iteration cycle — four chips in 24 months — raises the bar for in-house silicon development. For chip engineers and hardware architects, the expansion of custom AI silicon programs means growing demand for RISC-V specialists, ASIC designers, and inference optimization engineers across Big Tech.